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10:00 |
B3-1 |
A Partially Parallel Low-Density Parity Check Code Decoder with Reduced
Memory for Long Code-Length |
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PDF |
Chin-Kuang Lian, Shin-Yo Lin, Tsung-Han Tsai, and Chin-Long Wey, 國立中央大學
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10:15 |
B3-2 |
Architecture of Adaptive Channel Equalizer in Dedicated Short Range
Communication (DSRC) and Vehicle Infotainment Systems |
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PDF |
Yong-Hua Cheng, Yi-Hung Lu, and Chia-Ling Liu, 工業技術研究院 |
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10:30 |
B3-3 |
An Ultra-low Power Multi-mode LDPC Decoder Chip for Mobile WiMAX System |
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PDF |
Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu (Andy) Wu,
國立台灣大學 |
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10:45 |
B3-4 |
Baseband OFDM Receiver Design for Fixed WiMAX Communication |
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PDF |
Chi-chie Chang and Jen-Ming Wu, 國立清華大學 |
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11:00 |
B3-5 |
A Multi-Code Rate IEEE 802.16e LDPC Decoder Design |
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PDF |
Chih-Hao Hsiao and Yun-Nan Chang, 國立中山大學 |
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11:15 |
B3-6 |
Configurable Hierarchical Decoder Architectures for H-QC LDPC Codes |
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PDF |
Kuo-hsing Juan, Mong-kai Ku, and Yu-min Chang, 國立台灣大學 |