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10:00 |
D2-1 |
On Power-State-Aware Routing and Buffer Insertion |
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PDF |
Ming-Hua Wu and Iris Hui-Ru Jiang, 國立交通大學 |
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10:15 |
D2-2 |
An Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction
Algorithm |
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PDF |
Ya Wen Tsai, Yung Tai Chang, Jun Cheng Chi, and Mely Chen Chi, 中原大學 |
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10:30 |
D2-3 |
A Network-Flow Based Algorithm for Digital Microfluidic Biochip Routing |
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PDF |
Ping-Hung Yuh, Chia-Lin Yang, and Yao-Wen Chang, 國立台灣大學 |
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10:45 |
D2-4 |
A Transitive-Closure-Graph-Based Macro Placement Algorithm |
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PDF |
Hsin-Chen Chen, Yi-Lin Chuang, Zhe-Wei Jiang, and Yao-Wen Chang, 國立台灣大學
|
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11:00 |
D2-5 |
Optimal Redundant Via Insertion Using Mixed Integer Linear Programming |
| |
PDF |
Kuang-Yao Lee, Ting-Chi Wang, and Kai-Yuan Chao, 國立清華大學 |
|
11:15 |
D2-6 |
A Simple Yet Efficient Global Router with Mirrored Monotonic Routing and
Reduced Multi-Source Multi-Sink Maze Routing |
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PDF |
Ke-Ren Dai, Jyun-Yi Lin, and Yih-Lang Li, 國立交通大學 |