TECHNICAL PROGRAM
Session
P3A |
Day
08/10 |
Time
10:00-12:00
|
Chair 李順裕 教授
國立中正大學 |
Room
2F宴會廳 |
P3A-1 |
Voltage-Mode First Order All-Pass Filter using DDCC |
PDF |
Wei–Yuan Chiu , Jiun–Wei Horng, and Chuan–Hsien Chang, 中原大學 |
P3A-2 |
Analog Circuits Fault Diagnosis under Parameter Variations Based on
Fuzzy Logic system |
PDF |
林宗志、陳盈州、郭明仁, 逢甲大學 |
P3A-3 |
A CMOS Low-Noise Amplifier with Shunt-Peaking for 3-5GHz Ultra-Wideband
Wireless System |
PDF |
Zhe-Yang Huang, Che-Cheng Huang, and Chung-Chih Hung, 國立交通大學 |
P3A-4 |
Analytical Synthesis of Low-Sensitivity Voltage-Mode Odd-Nth-Order OTA-C
Elliptic Filter Structure with the Minimum Number of Components |
PDF |
Chun-Ming Chang, 中原大學 |
P3A-5 |
A 14-Bit Fourth-Order Sigma-Delta Modulator with Feedforward
Architecture for Hearing Aid |
PDF |
Shuenn-Yuh Lee, Jia-Hua Hong, Chi-Ching Lin, Chui-Kum Chiu, and
Sheng-Jing Ku, 國立中正大學 |
P3A-6 |
A UWB CMOS Power Amplifier With Differential to Single-Ended Converter |
PDF |
Shuenn-Yuh Lee and Guan-Da Lu, 國立中正大學 |
P3A-7 |
A 8-BIT 150-MS/S FULLY DIFFERENTIAL DUAL-CHANNEL TIME-INTERLEAVED
PIPELINE A/D CONVERTER |
PDF |
Chih-Hsiang Chang and Ching-Yuan Yang, 國立中興大學 |
P3A-8 |
A Wide-Band Low-Power Quadrature VCO |
PDF |
Ching-Yi Chen, 國立中正大學 |
P3A-9 |
Low Power Sigma Delta Modulator with Dynamic Biasing for Audio
Applications |
PDF |
Hsin-Liang Chen, Yi-Sheng Lee, and Jen-Shiun Chiang, 淡江大學 |
P3A-10 |
A New Current-Mode Wheatstone Bridge Based on Fully Differential
Operational Transresistance Amplifiers |
PDF |
Yuh-Shyan Hwang, Chun-Chi Shih, Jiann-Jong Chen,
and Wen-Ta Lee, 國立台北科技大學 |
P3A-11 |
An Embedded 10-bit 200MHz DAC IP with Self-Calibrating Current Bias for
SoC Applications |
PDF |
Chung-Ming Pan and Chien-Hung Tsai, 國立成功大學 |
|
TECHNICAL PROGRAM
Session
P3E |
Day
08/10 |
Time
10:00-12:00
|
Chair 蘇慶龍 教授
國立雲林科技大學 |
Room
2F宴會廳 |
P3E-1 |
Simultaneous Module Selection and Clock Skew Scheduling for Minimizing
Standby Leakage Current |
PDF |
Shih-Hsu Huang, Da-Chen Tzeng, and Chun-Hua Cheng, 中原大學 |
P3E-2 |
Totally Self-Checking Borden Code Checker Design Using Modulo Adders |
PDF |
Wen-Feng Chang, Debaleena Das, and Cheng-Wen Wu, 萬能科技大學 |
P3E-3 |
Analytical Aerial Imaging Simulation for OPC |
PDF |
陳中平、詹霖、曾俊貴、鍾士勇、王芝宇, 國立台灣大學 |
P3E-4 |
An Experiment of Test Plan Construction & Test Automation |
PDF |
Tsung-Ju Yang, Ming-Chang Tung, Wei-Yu Lin, Zhi-Wei Lin, Chi-Hen
Chang, and Farn Wang, 國立台灣大學 |
P3E-5 |
A Flip-Flop Replacement Technique for IR Drop Reduction |
PDF |
Jiun-Kuan Wu, Liang-Ying Lu, Kuang-Yao Chen,
and Tsung-Yi Wu, 國立彰化師範大學 |
P3E-6 |
A Design Methodology for Application-Specific Instruction-set Processors
with Memory Access Considerations |
PDF |
Ji-Ying Wu, Chi-Jie Lin, Je-Rung Shiu, De-Sheng Chen,
and Yi-Wen Wang, 逢甲大學
|
P3E-7 |
Yield Analysis for the 65nm SRAM Cells Design with Resolution
Enhancement Techniques (RET) |
PDF |
J. J. Tang, C. L. Liao, P. C. Jheng, S. H. Chen, K. M. Lai, and L. J.
Lin, 南台科技大學 |
P3E-8 |
Object-Oriented Hardware/Software Co-Design Using Java |
PDF |
Chin-Tai Chou, Fu-Chiung Cheng, and Hung-Chi Wu, 大同大學 |
|
TECHNICAL PROGRAM
Session
P3D |
Day
08/10 |
Time
10:00-12:00
|
Chair 朱守禮 教授
中原大學 |
Room
2F宴會廳 |
P3D-1 |
High-speed, Low Cost Parallel Memory-Based FFT Processors for OFDM
Applications |
PDF |
Shin-Yo Lin, Wei-Chien Tang, Muh-Tien Shiue, and Chin-Long Wey, 國立中央大學 |
P3D-2 |
Self –Aligned Double Bits SONOS Cell and Its Memory Circuit Design |
PDF |
Jyi-Tsong Lin, Wei-Ching Lin, and Ho-Lin Lee, 國立中山大學 |
P3D-3 |
Computation Sharing Programmable FIR Filter Using Canonic Signed Digit
Representation |
PDF |
Shui-Wen Hsu and Yuan-Hao Huang, 國立清華大學 |
P3D-4 |
A Low-Complex Image Coding Algorithm Based on Wavelet Transform |
PDF |
Trong-Yen Lee, Yang-Hsin Fan, and Su-Zhen Hong, 國立台北科技大學 |
P3D-5 |
A Low-Complexity High-Performance Two-Dimensional Look-Up Table for LDPC
Hardware Implementation |
PDF |
Tzu-Wen Chung, Chen-Pang Chang, Jung-Chieh Chen,
and Po-Hui Yang, 國立高雄師範大學 |
P3D-6 |
Hierarchical Decision Table for Bad Pixel Detection in Stereo Vision |
PDF |
Tsung-Hsien Tsai, Nelson Yen-Chung Chang, and Tian-Sheuan Chang, 國立交通大學 |
P3D-7 |
An Efficient Metric Normalization Architecture for High-speed Low-power
Viterbi Decoder |
PDF |
Kelvin Yi-Tse Lai, 國立雲林科技大學 |
P3D-8 |
Design and Implementation of a Real-Time Global Tone Mapping Processor
for High Dynamic Range Video |
PDF |
Tsun-Hsien Wang, Wei-Su Wong , Fang-Chu Chen, and Ching-Te Chiu, 國立清華大學
|
P3D-9 |
Design a Hardware Interprocessor Communication Mechanism for a
Multi-core Computer System |
PDF |
Slo-Li Chu, Chih-Chieh Hsiao, Pin-Hua Chiu,
and Hsien-Chang Lin, 國立中原大學 |
P3D-10 |
A HIGH PERFORMANCE CAVLC DECODER USING NON-ZERO SKIP AND MULTI-LEVEL
DECODING |
PDF |
Tsung-Han Tsai and De-Lung Fang, 國立中央大學 |
|