Tutorial (2)

 

    題:

Optimization Techniques for SoC Design

  主講人:

  海 教授

  主持人: 王廷基 教授
      間:

87() 19:00-21:00

      點: 3F 305教室

 

 

主講人介紹

Hai Zhou is an associate professor in Electrical Engineering and Computer Science at Northwestern University. He got his Ph.D. degree in Computer Sciences from the University of Texas at Austin in 1999, and his B.S. and M.S. degrees in Computer Science and Technology from Tsinghua University in Beijing, China in 1992 and 1994, respectively.

His research interests include VLSI computer-aided design, algorithm design, and formal methods. He has published more than 70 technical papers in prestigious journals and conferences in these areas. He was a recipient of a CAREER Award from the National Science Foundation in 2003, and served on the technical program committees of ACM Design Automation Conference, IEEE International Conference on Computer-Aided Design, and many other conferences.

 

 
 

內容摘要

With the rapid scaling down of feature sizes and increasing of operating frequencies in VLSI, System-on-Chip has become necessary for many applications. Timing, noise, power consumption, and process variations are all the issues that need to be optimized in a complex SoC design. In this tutorial, we will cover some of the most important optimization techniques for modern SoC designs.

After a brief review of critical design issues in SoCs, we will focus on a set of optimization problems and present efficient algorithms for solving them. The first problem addresses the global interconnects with delay of multiple clock periods. We propose a technique called wire retiming to place registers on these wires while maintaining the functional correctness of the whole circuit. The second problem considers how to optimally buffer a whole circuit such that its timing constraint is satisfied. Statistical optimization techniques for process variations may also be presented if time permits.